Key Features

• SPC560D40L1 32-bit 48 MHz e200z0h CPU, 32-bit Power Architecture^® Technology CPU, 256 KB Code Flash in an LQFP64 package.
• On-board USB-JTAG PLS debugger and HW selection mode to use stand-alone JTAG debuggers.
• Board power supply: through external +12 V PSU or from the USB bus (5 V supply voltage).
• Seven LEDs: D6 for 5 V power on,D2 for Reset, D101, D102, D103 for PLS debugger section, D7 and D8 for PC3 and PC2 outputs (for user)
• Two push buttons (reset and user)
• A potentiometers for ADC input (user)
• Two extension headers (2 x 36 pin - 100 mil) for all LQFP64 pins and for quick connection to prototyping boards, additional modules and easy probing.
• JTAG interface (2 x 7 male 100 mil connector)
• USB port (mini -B)
• 16 MHz crystal
• Specification: